Your future responsibilities
- Coordination of infrastructure ramp up for FOWLP line at Silicon Austria labs
- Development and optimization of FOWLP processes for both chip-first and chip-last approaches, including die placement, wafer-level molding, processing of RDL & TMV.
- Designing fan-out package layouts, considering electrical performance, thermal dissipation, and reliability.
- Concept development, DOE planning, and characterization in an interdisciplinary team
- Development of FOWLP SIP for Power Electronics, MEMS and RF devices
- Contributing to different industrial projects
- Data analysis
- Technical reporting and scientific dissemination
- Project management